1. Field of the Invention
The invention relates generally to a startup circuit as used to commence operation of a reference voltage source in a circuit design and more specifically relates to a startup circuit design that uses transistors operating at a lower voltage level than the provided Vdd and that operates to consume no static power after the reference source has reached normal operating parameters and that operates to avoid stressing any of the transistors in the startup circuit.
2. Discussion of Related Art
It is common in a variety of electronic application designs to provide a reference voltage source for generating one or more reliable voltage levels (e.g., NBIAS and/or PBIAS) for use within the application circuit. The reference source derives its operating power and generates the reference voltage from a ubiquitous power supply source in the application (e.g., Vdd voltage level and a corresponding Vss often ground or zero volts). Those of ordinary skill in the art will recognize that a reference source may also be used to generate a constant source of precise current for some applications. The problems discussed below and the solutions provided by features and aspects hereof are similarly applicable to such a reference current source.
Typical reference source designs may not start operating by simple application of Vdd thereto depending on a number of design and environmental conditions. It is generally known in the design of reference sources that a startup circuit is required to transition the reference voltage from an inoperable or dead state to a normal, steady-state, operating state providing the stable, desired reference voltage levels. It is desirable that such a startup circuit consumes no power/current once the reference source has achieved its desired, normal, stable operating state. This is particularly desirable in low power electronic applications where conservation of electrical power is critical such as in remote process control applications and a variety of portable electronic applications.
A variety of startup circuits are well known as evidenced, for example, in: “Low Power Startup Circuits For Voltage and Current Reference with Zero Steady State Current” (Khan, et al.; ISLPED '03 Conference Proceedings; ACM; pp. 184-188, 2003). In particular, Khan describes two general varieties of startup circuits—a first that operates responsive to a power-up/power-down signal and a second responsive to the ramp up of Vdd provided ubiquitously in the application from power up of the common power supply.
Khan presents one particular exemplary embodiment in his FIG. 4 that describes a startup circuit operable responsive to ramp up of Vdd and configured to consume no static power following commencement of normal, steady state, operation of the reference source.
In older application designs, the various components (e.g., transistors) of the application operated at the voltage levels of the ubiquitous Vdd power supply. In more modern or low voltage applications, it is common that low voltage devices (e.g., transistors and other components) of the application circuit operate at a higher voltage domain. Hence, where Vdd may exceed the operating parameters of transistors of the startup circuit, startup circuits such as those exemplified by Khan may stress the transistors of the startup circuit causing immediate or eventual failure.
It is evident from the above discussion that a need exists for an improved startup circuit design that avoids applying stress conditions to any of the transistors of the startup circuit while providing flexibility and low power consumption of prior designs.